以第一作者或通讯作者发表的期刊论文如下： [1]Dong Liu,Mingyue Li,Yangjie Ou,Zhong Lan,Maosen Tang,Weibo Wang,Xiarong Hu. 1.2 kV 4H‐SiC planar power MOSFETs with a low‐K dielectric in central gate[J]. IET Circuits, Devices & Systems,2022, 1-8(SCI) [2]Xiarong Hu, Weibo Wang, Lv Rui. The differences between N- and N+ buried layers in improving the breakdown voltage of RESURF LDMOSFETs[J].INTERNATIONAL JOURNAL OF NUMERICAL MODELLING-ELECTRONIC NETWORKS DEVICES AND FIELDS, 2019,33:e2693(SCI) [3]Xiarong Hu, Weibo Wang, Yupin Ji, and Qing Hua. The influence of the N+ floating layer on the drift doping of RESURF LDMOS and its analytical model[J]. IEICE Electronics Express, 2016,13(20):1-6 (SCI) [4]Hu Xiarong, Lv Rui. An analytical model for the vertical electric field distribution and optimization of high voltage REBULF LDMOS[J]. Chin. Phys. B, 2014, 23(12):128501(SCI) [5] Xiarong Hu, Bo Zhang, Xiaorong Luo, and Zhaoji Li. Analytical models for the electric field distributions and breakdown voltage of triple RESURF SOI LDMOS[J]. Solid-State Electron, 2012, 69: 89-93(SCI) [6] Xiarong Hu, Bo Zhang, Xiaorong Luo, Yongheng Jiang, and Zhaoji Li. SOI LDMOS with a variable-k dielectric trench[J]. Electron Letter, 2012, 48(19): 1235-1237(SCI) [7] Hu Xiarong, Zhang Bo, Luo Xiaorong, Wang Yuangang, Lei Tianfei, and Li Zhaoji. A new analytical model for the surface electric field distribution and breakdown voltage of the SOI trench LDMOS[J]. Chin. Phys. B, 2012, 21(7):078502(SCI) [8] Hu Xiarong, Zhang Bo, Luo Xiaorong, and Li Zhaoji. Universal trench design method for high voltage SOI trench LDMOS[J]. Journal of Semiconductors, 2012, 33(7):074006(EI) [9] Hu Xiarong, Zhang Bo, Luo Xiaorong, Yao Guoliang, Chen Xi, and Li Zhaoji. A new high voltage SOI LDMOS with triple RESURF structure[J]. Journal of Semiconductors, 2011, 32(7):074006(EI) |
